The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a system and m been applied to design and fabrication of metal-oxide-semiconductor field effect transistor with method for an improved field effect transistors. Merely by way of example, the invention has small dimensions. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to other types of semiconductors.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. An example of such limit is the manufacturing of metal oxide semiconductor field-effect transistor (MOSFET) at reduced sizes.
Since the invention of the MOSFET, there has been continuous efforts to scale down for smaller dimensions. During the 1990's, the MOSFET channel lengths are typically in order of several micrometers. However, with the advent of improved fabrication process, the dimensions for MOSFET has been greatly reduced. More recently, the MOSFET channel lengths are being reduced to 90 nanometers or less.
There are various reasons for reducing MOSFET sizes. For example, by reducing the size of MOSFET devices, the material and area needed for a MOSFET on an integrated circuit is reduced, and so is the cost. In addition, MOSFET with a smaller size usually means allow more current to pass through. There are other benefits as well.
However, the redaction of transistors sizes sometimes also introduces various problems for MOSFET performance, efficiency, and reliability. In the past various techniques have been developed. Unfortunately, these techniques are often inadequate.
From the above, it is seen that an improved technique for processing semiconductor devices is desired.